报告题目：Design for Manufacturability in Extreme Scaling

报告人：Bei Yu教授

时间：7月24日（周日）上午10：00-11：30

地点：数计学院3号楼102B室

报告内容摘要：

The continuous shrinking of feature sizes for very large scale integrated (VLSI) circuits with advanced lithography has been a holy grail for the semiconductor industry to achieve ever-higher device density and performance with reduced cost per transistor. However, due to the more and more serious manufacturability and reliability issues, this aggressive scaling has been facing severe challenges. Multiple patterning lithography, along with other advanced lithography techniques, e.g., extreme ultraviolet, elect​r​on beam, directed self-assembly, are promising solutions to overcome these challenges. In this talk I will introduce our coherent CAD framework to provide multiple patterning lithography manufacturing friendly design. Besides, I will describe our physical verification tool to detect the hotspots, which are lower fidelity patterns on a layout. Integrated with a set of machine learning techniques, our tool is shown to be effective to detect most of the hotspots, and thus be able to enhance the design reliability.

报告人简介:

Professor Bei Yu is currently an Assistant Professor at the Department of Computer Science and Engineering, The Chinese University of Hong Kong. He received the Ph.D degree from Electrical and Computer Engineering, University of Texas at Austin, USA in 2014. His current research interests include design for manufacturability, cyber physical systems, machine learning and combinatorial algorithms with applications in VLSI CAD. He received three Best Paper Awards in SPIE-16,  ICCAD-13 and ASPDAC-12, three ICCAD contest awards in 2012, 2013 and 2015, IBM Ph.D. Scholarship in 2012, SPIE Education Scholarship in 2013, and EDAA Outstanding Dissertation Award in 2014.

欢迎感兴趣的师生参加！