Talk :Routability Estimation for VLSI Design

报告时间：2016年12月2号，2:30pm-3:30pm

报告地点：数计学院4号楼第1报告厅

Abstract:

Routability has become a very challenging issue for modern VLSI design. In this talk, effective routability estimation approaches, respectively from the global routing and track assignment perspectives, will be introduced. Experimental results will be shown to support these approaches as well.

Speaker Bio:

Ting-Chi Wang received the B.S. degree in Computer Science and Information Engineering from National Taiwan University, Taipei, Taiwan, and the M.S. and Ph.D. degrees in Computer Sciences from the University of Texas at Austin, USA. He is currently a Professor in the Department of Computer Science and the Director of Institute of Information Systems and Applications, National Tsing Hua University, Hsinchu, Taiwan. His major research interest is in VLSI physical design automation. 

Dr. Wang received Best Paper Awards respectively from 2006 ASP-DAC and 2015 ISPD for his works on redundant via insertion and triple patterning layout decomposition. He supervised a team to win the first place at 2008 ISPD Global Routing Contest. He was the General Chair of 2015 SASIMI and served on the technical program committees of major EDA conferences, including ASP-DAC, DAC, DATE, ICCAD, and ISPD. He was an Associate Editor of ACM TODAES from 2013 to 2016.